<?xml version="1.0" encoding='ISO-8859-1'?>
<!--DOCTYPE component PUBLIC "-//OCERA//DTD component XML V1.0//EN" "file:component.dtd"-->

<component id="verbus" name="CAN model">
  <title>CAN model by timed automata /Petri Nets</title>
  <info>
    <authorgroup>
      
      <author>
	<firstname>Jan</firstname>
	<surname>Krakora</surname>
	<affiliation>
	  <orgname>CTU</orgname>
	</affiliation>
	<email><ulink url="mailto:krakorj@rtime.felk.cut.cz">krakorj@rtime.felk.cut.cz</ulink></email>
      </author>

      <author>
	<firstname>Zdenek</firstname>
	<surname>Hanzalek</surname>
	<affiliation>
	  <orgname>CTU</orgname>
	</affiliation>
	<email><ulink url="mailto:hanzalek@rtime.felk.cvut.cz">hanzalek@rtime.felk.cvut.cz</ulink></email>
      </author>

    </authorgroup>
    
    <copyright>
      <year>2003</year>
      <holder>OCERA Consortium</holder>
    </copyright>

    <workpackage id="WP7" />

    <date start="01/07/2002" release="01/04/2003"/>

    <version value="0.1"/>
    <license value="GPL"/>
    <status value="Analysis"/>
    <home-page url="http://www.ocera.org"/>
    <!--<hardware processor="Independent"/>-->
    <!--<platform rtlinux="3.1"/>-->
    <componenttype value="Application"/>
    <keywords>Real-Time, CAN, Petri Nets, communications</keywords>
    <reviewergroup>
      <author>
	<firstname></firstname>
	<surname></surname>
	<affiliation>
	  <orgname></orgname>
	</affiliation>
	<email><ulink url="mailto:"></ulink></email>
      </author>
    </reviewergroup>

  </info>


  <!-- ================================================== Description -->
  <description>
    This component is theoretical study
	      offering methodology tool support for analysis of
	      distributed system consisting of
	      n independent processors and
	      deterministic communication bus (CAN).  In order to
	      verify distributed RT system, application designer needs
	      to create a model of application tasks and to interconnect
	      this model with the communication bus model provided by this
	      component. Finally he/she needs to define system
	      properties to be verified (deadlock, missed deadline
	      etc.). This component can be used either in a design phase or it can be used to verify
	      existing implementation. 
  </description>  
</component>

