/* * linux/include/asm/hw_irq.h * * (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar * * moved some of the old arch/i386/kernel/irq.h to here. VY * * IRQ/IPI changes taken from work by Thomas Radke * */ #include #include #include #define SA1100_IRQ(x) (0 + (x)) #define IRQ_GPIO0 SA1100_IRQ(0) #define IRQ_GPIO1 SA1100_IRQ(1) #define IRQ_GPIO2 SA1100_IRQ(2) #define IRQ_GPIO3 SA1100_IRQ(3) #define IRQ_GPIO4 SA1100_IRQ(4) #define IRQ_GPIO5 SA1100_IRQ(5) #define IRQ_GPIO6 SA1100_IRQ(6) #define IRQ_GPIO7 SA1100_IRQ(7) #define IRQ_GPIO8 SA1100_IRQ(8) #define IRQ_GPIO9 SA1100_IRQ(9) #define IRQ_GPIO10 SA1100_IRQ(10) #define IRQ_GPIO11_27 SA1100_IRQ(11) #define IRQ_LCD SA1100_IRQ(12) /* LCD controller */ #define IRQ_Ser0UDC SA1100_IRQ(13) /* Ser. port 0 UDC */ #define IRQ_Ser1SDLC SA1100_IRQ(14) /* Ser. port 1 SDLC */ #define IRQ_Ser1UART SA1100_IRQ(15) /* Ser. port 1 UART */ #define IRQ_Ser2ICP SA1100_IRQ(16) /* Ser. port 2 ICP */ #define IRQ_Ser3UART SA1100_IRQ(17) /* Ser. port 3 UART */ #define IRQ_Ser4MCP SA1100_IRQ(18) /* Ser. port 4 MCP */ #define IRQ_Ser4SSP SA1100_IRQ(19) /* Ser. port 4 SSP */ #define IRQ_DMA0 SA1100_IRQ(20) /* DMA controller channel 0 */ #define IRQ_DMA1 SA1100_IRQ(21) /* DMA controller channel 1 */ #define IRQ_DMA2 SA1100_IRQ(22) /* DMA controller channel 2 */ #define IRQ_DMA3 SA1100_IRQ(23) /* DMA controller channel 3 */ #define IRQ_DMA4 SA1100_IRQ(24) /* DMA controller channel 4 */ #define IRQ_DMA5 SA1100_IRQ(25) /* DMA controller channel 5 */ #define IRQ_OST0 SA1100_IRQ(26) /* OS Timer match 0 */ #define IRQ_OST1 SA1100_IRQ(27) /* OS Timer match 1 */ #define IRQ_OST2 SA1100_IRQ(28) /* OS Timer match 2 */ #define IRQ_OST3 SA1100_IRQ(29) /* OS Timer match 3 */ #define IRQ_RTC1Hz SA1100_IRQ(30) /* RTC 1 Hz clock */ #define IRQ_RTCAlrm SA1100_IRQ(31) /* RTC Alarm */ #define IRQ_GPIO_11_27(x) (32 + (x) - 11) #define IRQ_GPIO11 IRQ_GPIO_11_27(11) #define IRQ_GPIO12 IRQ_GPIO_11_27(12) #define IRQ_GPIO13 IRQ_GPIO_11_27(13) #define IRQ_GPIO14 IRQ_GPIO_11_27(14) #define IRQ_GPIO15 IRQ_GPIO_11_27(15) #define IRQ_GPIO16 IRQ_GPIO_11_27(16) #define IRQ_GPIO17 IRQ_GPIO_11_27(17) #define IRQ_GPIO18 IRQ_GPIO_11_27(18) #define IRQ_GPIO19 IRQ_GPIO_11_27(19) #define IRQ_GPIO20 IRQ_GPIO_11_27(20) #define IRQ_GPIO21 IRQ_GPIO_11_27(21) #define IRQ_GPIO22 IRQ_GPIO_11_27(22) #define IRQ_GPIO23 IRQ_GPIO_11_27(23) #define IRQ_GPIO24 IRQ_GPIO_11_27(24) #define IRQ_GPIO25 IRQ_GPIO_11_27(25) #define IRQ_GPIO26 IRQ_GPIO_11_27(26) #define IRQ_GPIO27 IRQ_GPIO_11_27(27) #define BUILD_IRQ_HANDLER() \ asmlinkage void irq_interrupt(void); \ __asm__( \ "irq_interrupt: \n\t" \ " ldr r13,.LCsirq \n\t" \ " sub lr,lr,#4 \n\t" \ " str lr,[r13] \n\t" \ " mrs lr,spsr \n\t" \ " str lr,[r13,#4] \n\t" \ " \n\t" \ " mov r13,#0x93 \n\t" \ " msr spsr_c,r13 \n\t" \ " adr lr,irq_interrupt_svc \n\t" \ " movs pc,lr \n\t" \ " \n\t" \ " irq_interrupt_svc: \n\t" \ " ldr lr,__irq \n\t" \ " stmfd sp!,{r0-r12,lr} \n\t" \ " ldr r0,__status \n\t" \ " stmfd sp!,{r0} \n\t" \ " bl do_IRQ \n\t" \ " ldmfd sp!,{r0} \n\t" \ " msr spsr,r0 \n\t" \ " ldmfd sp!,{r0-r12,lr} \n\t" \ " movs pc,lr \n\t" \ " \n\t" \ " .LCsirq: .word __irq \n\t" \ " __irq: .word 0 \n\t" \ " __status:.word 0 \n\t"); #define BUILD_FIRQ_HANDLER() \ asmlinkage void firq_interrupt(void); \ __asm__( \ "firq_interrupt: \n\t" \ " bl do_FIRQ \n\t" \ " subs pc,r14,#4 \n\t"); #define BUILD_RESERVED_HANDLER() \ asmlinkage void reserved_interrupt(void); \ __asm__( \ "reserved_interrupt: \n\t" \ " bl do_RESERVED \n\t" \ " subs pc,r14,#4 \n\t"); #define BUILD_DATA_HANDLER() \ asmlinkage void data_interrupt(void); \ __asm__( \ "data_interrupt: \n\t" \ " bl do_DATA \n\t" \ " subs pc,r14,#4 \n\t"); #define BUILD_PRE_HANDLER() \ asmlinkage void pre_interrupt(void); \ __asm__( \ "pre_interrupt: \n\t" \ " bl do_PRE \n\t" \ " subs pc,r14,#4 \n\t"); #define BUILD_SWI_HANDLER() \ asmlinkage void swi_interrupt(void); \ __asm__( \ "swi_interrupt: \n\t" \ " bl do_SWI \n\t" \ " subs pc,r14,#4 \n\t"); #define BUILD_IRQ_BRANCH() \ asmlinkage void irq_branch(void); \ __asm__( \ "irq_branch:\n\t" \ " .word 0 \n\t" \ " .word 0 \n\t" \ " ldr pc,swi_jmp \n\t" \ " ldr pc,pre_jmp \n\t" \ " ldr pc,data_jmp \n\t" \ " ldr pc,reserv_jmp \n\t" \ " ldr pc,irq_jmp \n\t" \ " ldr pc,firq_jmp \n\t" \ " .word 0 \n\t" \ " .word 0 \n\t" \ "swi_jmp: .word swi_interrupt \n\t" \ "pre_jmp: .word pre_interrupt \n\t" \ "data_jmp: .word data_interrupt \n\t" \ "reserv_jmp: .word reserved_interrupt \n\t" \ "irq_jmp: .word irq_interrupt \n\t" \ "firq_jmp: .word firq_interrupt \n\t"); #define BUILD_BREAKPOINT_INT() // External Declaration // extern void set_intr_gate(unsigned int n, void *addr); extern void set_trap_gate(unsigned int n, void *addr);